Responsibilities

• Provided cross-functional engineering support for the Storage Logic Array (S/LA) design system, collaborating with design, CAD, QA, and product management teams.
• Delivered Quality Assurance testing, demonstrations, documentation, training, and technology file maintenance.
• Supported continuous improvement of design methodologies and tool integration across multiple engineering groups.

Accomplishments

• Executed over 400 production tape-outs with zero defects, ensuring reliable delivery across multiple product lines.
• Automated backend verification and regression testing processes, improving consistency and turnaround time.
• Received the Zero-Defect Award (Cell-Set & Mask Technology Team) for sustained quality performance.
• Developed density analysis tools and supporting RDBMS to evaluate technology impact on ASIC transistor density.
• Ported design and QA tools from Sun3 to Sun4 platforms; deployed and maintained the Magic layout editor.
• Trained and mentored junior engineers in tool usage, scripting, and tape-out methodologies.

Tool Set

Magic, Cadence DFII, Dracula, UNIX/Sun, Emacs, Shell, Make, SCCS, RDBMS, C/C++/LISP